The present invention generally relates to computer memory system access, and more specifically, to memory access optimization for an input/output (I/O) adapter in a processor complex.
A processor complex can be formed by physically integrating multiple platforms together in larger physical containers (e.g., blade, chassis and rack systems) as a single larger-scale platform. A processor complex can include tiers of both physical and virtual hosting with different physical distance attributes. Memory access within the processor complex and/or between the processor complex and one or more other computer systems can be performed through one or more I/O adapters.